Ph. D.
Evgeny Bolotin , “Network On Chip”,
(With I. Cidon (principal supervisor after conversion to direct PhD track) and R. Ginosar).
Graduated: 2007; Currently with Nvidia, CA.
Arkadiy Morgenstein, “Links for Network-on-Chip”, (with E. Friedman and R. Ginosar (principal supervisor)).
Graduated: 2008; Currently with IBM.
Tomer Morad, “Asymmetric Clustered Chip Multiprocessors”, (principal supervisor ,with U. Weiser).
Graduated: 2016, currently a post-doc at COrnellTech.
Konstantin Moiseev, “CMOS layout migration automation”, (principal supervisor, with S. Wimer).
Graduated: 2010 currently with Intel.
Reuven Dobkin, “High speed asynchronous communication for SoC” (with R. Ginosar (principal supervisor)).
Graduated: 2009.
Zigi Walter, Network on Chip for CMP (with I. Cidon (principal supervisor)).
Graduated: 2010 currently with Intel.
Zvika Guz ,”Cache organization for chip multiprocessors”,
(with U. Weiser (principal supervisor) and I. Keidar)
Graduated: 2010, currently with Nvidia, CA.
Ran Manevich, “Bus enhanced Network on Chip” (principal supervisor, with I. Cidon).
Graduated: 2014, currently with IDF.
Yaniv Ben-Izhak, (principal supervisor, with I. Cidon).
Graduated: 2014, currently with IBM.
Eitan Zahavi, “Lossless networks in and out of the chip” (principal supervisor, with I. Cidon and I. Kesslassy).
Graduated: 2016, currently with Mellanox.
Shahar Kvatinsky, “Memristor-based circuits and architectures” (principal supervisor, with E. Friedman and U. Weiser).
Graduated: 2014, currently an assistant professor at the Technion.
M.Sc.
Yaron Elboim, “Clocking issues in System-On-Chip design”, (With Dr. R. Ginosar).
Graduated: 2001; Currently with Wilocity.
Noam Dolev, “Integrated low-voltage delta-sigma conversion circuits in digital CMOS Technology”.
Graduated: 2002; Currently a Ph.D. student at Stanford.
Oleg Milter, “Synthesis of CMOS VLSI circuits considering digital noise effects”.
Graduated: 2002; Currently logic synthesis team leader in the mobile processors division at Intel.
Georgy Schupak, “High-speed, low-power medium-size cache design”.
Graduated: 2002; Currently design team leader at Intel’s mobile processors division.
Oleg Kosyakovsky, “Approaches to managing Trace Cache in computer systems”,
(With Dr. A. Mendelson (principal supervisor)).
Graduated: 2002; Currently a software engineer at Intel.
Nir Magen, “Power Issues in VLSI Interconnect”, (With Dr. U. Weiser).
Graduated: 2003; Joined Intel after graduation. Died in a road accident in 2005.
Assad Khamaisee, “Combining trace cache and value prediction”, (With Dr. A. Mendelson (principal supervisor)).
Graduated: 2003; Currently with Mellanox.
Michael Moreinis, “Repeater insertion in deep submicron VLSI circuits”.
Graduated: 2004; Currently a circuit designer at Intel.
Tomer Morad, “Data trace cache”, (With Dr. U. Weiser (principal supervisor)).
Graduated: 2005; Currently with Horizon semiconductor and a PhD student.
Shay Michaely, “Wiring modifications for optimal migration of processors”, 2005. (With Dr. S. Wimer).
Grduated: 2005;
Konstantin Moiseev, “Performance optimization by wire reordering”, (With Dr. S. Wimer).
Graduated: 2005; Currently with Intel.
Walter Isaskhar, “Functional interfaces for Network-On-Chip”, (With Prof. I. Cidon (principal supervisor) and Dr. R. Ginosar).
Graduated: 2005; Currently with Intel.
Michael Behar, “Hot traces in modern processors”, (With Dr. A. Mendelson (principal supervisor)).
Graduated: 2005; Currently with Intel.
Anastasia Barger, “Modeling and design of Network-on-Chip interconnects”.
Graduated: 2006; Currently with Intel.
Michael Sotman, “Power delivery structures in VLSI”.
Graduated: 2006; Currently with Intel.
Dror Barash, “Cache Manipulations to Improve Multimedia Applications”, (with U. Weiser (principal supervisor)).
Graduated: 2007;
Iris Sorani, Long Instruction Traces and their Usage”, (with A. Mendelson (principal supervisor)).
Graduated: 2007; currently with Intel.
Evgeny Krimer, “Evaluation and Optimization of Transmission Latencies in a
Network-On-Chip”, (with Dr. I. Kelassy (principal supervisor)).
Graduated: 2009; currently a PhD student at UT Austin.
Chen Damishian, “Improving cache management policy by identifying repeated sequences of accesses”, (with Dr. A. Mendelson (principal supervisor)).
Graduated: 2009; currently with Intel.
Yaniv Ben-Izhak, “Performance and Power Aware Threads Allocation for NoC CMP”, (with I. Cidon (principal supervisor)).
Graduated: 2009. Currently a PhD student.
Inna Vaisband, “Low Power Clocking,” (with E. Friedman and R. Ginosar (principal supervisor)).
Graduated: 2009; currently a PhD student at U. Rochester.
Yoni Aizik, “Design Considerations for Low Power CMOS Digital Circuits”.
Graduated: 2009; currently with Intel.
Shmuel Zobel, |”Performance-power tradeoffs in General Purpose Graphics Processors,” (with A. Mendelson (principal supervisor)).
Graduated: 2010; currently with Intel.
Ameer Abdel-Hadi, “Non-uniform Mesh clocking,” M.Sc. (with E. Friedman and R. Ginosar).
Graduated: 2010; currently a PhD student at UBC.
Anna Kouslik, “Power Macro-modeling in VLSI design “.
Graduated: 2010; currently with Intel.
Gregory Sizikov, “Design and Analysis of Integrated Voltage Regulators,” (with E. Friedman).
Graduated: 2011; currently with Google.
Yaron Cohen, “Low Power D/A Converter Design Considerations,” (with R. Ginosar (principal supervisor)).
Graduated: 2012; currently with CSR.
Victoria Vishnyakov, “Inductive effects in on-chip interconnect,” (with E. Friedman).
Graduated: 2012; currently with Intel.
Amnon Stanislavsky, “Power-driven floorplanning”, (with S. Wimer).
Roman Malits, “Novel thread scheduling in GPGPU”, (with A. Mendelson (principal supervisor)).
Graduated: 2012; currently with Rafael.
Leon Polishuk, “Latency considerations for NoC interconnection fabrics” (with I. Cidon).
Graduated: 2013; currently with Intel.
Yifat Levy, “Digital circuits design using memristors”.
Graduated: 2014; currently with Intel.